1. Field of the Invention
The present invention relates to an energy dispersal circuit used in a receiver for digital broadcast, and a receiver using the same.
2. Discussion of the Related Art
There are various transmission methods for digital broadcast, examples of which include ISDB-T (Integrated System Digital Broadcasting-Terrestrial) which is a Japanese terrestrial digital television broadcasting method, ISDB-TSB (Integrated System Digital Broadcasting-Terrestrial Sound Broadcasting) which is a Japanese terrestrial digital audio broadcasting method, ISDB-S (Integrated System Digital Broadcasting-Satellite) which is a Japanese satellite digital broadcasting method, DVB-T (Digital Video Broadcasting-Terrestrial) which is an European terrestrial digital television broadcasting method, and the like. One of processes commonly used in these transmission methods is energy dispersal (also called randomizing).
FIG. 1 illustrates a principal configuration of the energy dispersal circuit. In FIG. 1, an energy dispersal unit 201 has a PRBS generating section 202 for generating a pseudo random binary sequence (hereinafter, referred to as PRBS) and an XOR operating circuit 205 for executing exclusive-OR operation (hereinafter, referred to as XOR). The PRBS generating section 202 is configured by a 15-bit shift register 203 and an XOR operator 204. The XOR operating circuit 205 executes an XOR operation with respect to a data signal inputted to the energy dispersal unit 201 and a PRBS generated by the PRBS generating section 202. The energy dispersal unit 201 is provided on both transmitter and receiver sides and is used for substantially equalizing ratios of “0” and “1” in digital data to be transmitted. In the energy dispersal unit 201, a predetermined value is defined as an initial value of the shift register 203, and the shift register 203 is initialized at predetermined cycles. The initial value of the shift register 203 is, sequentially from a lower order (left side in the FIG. 1), “100101010000000”, which is common in all of the ISDB-T, ISDB-TSB, ISDB-S and DVB-T. The cycle at which the shift register 203 is initialized is one frame (approximately 53 milliseconds (hereinafter, ms) to approximately 257 ms) in the case of the ISDB-T and ISDB-TSB, one super frame (approximately 10 ms) in the case of the ISDB-S and eight transport packets (approximately 70 microseconds (hereinafter, μs) to approximately 300 μs) in the case of DVB-T.
FIG. 2 is a block diagram illustrating a general configuration of a receiver for the Japanese digital television broadcast. In the figure, a satellite receiving antenna 301 and a terrestrial receiving antenna 302 are connected to a receiver 303. The receiver 303 in the figure can respond to both the satellite and terrestrial broadcasts, or may be an exclusive-use receiver for accepting inputs from only one of the antennas. As a different option, the receiver 303 may be constituted as a receiver capable of accepting inputs of broadcast waves through cables and the like and an input transport stream from an external apparatus. A video signal or an audio signal or both of those signals, which are obtained by the receiver 303, are outputted to a video/audio display device 304 to be displayed thereon. The receiver 303 can incorporate the video/audio display device 304 therein.
FIG. 3 is a block diagram illustrating a general configuration of the receiver 303. A satellite front end 401 receives a satellite receive signal and performs channel selection, demodulation and error correction thereto, and outputs a transport stream (hereinafter, referred to as TS). A terrestrial front end 402 receives a terrestrial receive signal and performs the channel selection, demodulation and error correction thereto, and outputs a TS. A video/audio decoder 403 receives any of the TS outputted from the satellite front end 401, TS outputted from the terrestrial front end 402 and TS inputted from the external apparatus, and converts it into the video signal and the audio signal.
FIG. 4 is a block diagram illustrating a general configuration of the terrestrial front end 402. The receive signal is channel-selected by a tuner 501 and is converted into a digital signal by an A/D converter 502. An orthogonal demodulating division 503 executes an orthogonal demodulation to the inputted digital signal and converts it into a base band OFDM signal. An FFT division 504 executes the fast Fourier transform to the signal from the orthogonal demodulating division 503 to convert the signal of time domain into a signal of frequency domain and then output it. A demodulating division 505 executes a synchronous demodulation or a differential demodulation to the signal from the FFT division 504 and outputs the demodulated signal. An error correcting division 506 executes an error-corrective decoding to the demodulated signal obtained from the demodulating division 505. A symbol synchronization division 507 detects transmission mode information and a symbol synchronization timing from the base band OFDM signal outputted from the orthogonal demodulating division 503. The symbol synchronization division 507 then supplies a symbol timing signal to the FFT division 504 and the demodulating division 505, and supplies the symbol timing signal and the transmission mode information to the error correcting division 506. A frame synchronization division 508 extracts control information included in the signal outputted from the FFT division 504 and detects a deviation generated from a leading position of a frame to a leading position of a symbol as a symbol number based on the control information. The frame synchronization division 508 then supplies the control information and the symbol number to the demodulating division 505 and the error correcting division 506.
The transmission mode information includes a mode (three kinds of 1, 2 and 3) for regulating a carrier interval in the transmitted OFDM symbol, and a guard interval length for regulating a length of a guard interval serving to alleviate multi-path interferences caused by reflected waves and the like. As the control information can be mentioned, in the case of the ISDB-T and ISDB-TSB, for example, a signal called TMCC (Transmission and Multiplexing Configuration Control) signal for transmitting a configuration of a hierarchical transmission, a carrier modulation method per hierarchy, a rate of convolution coding per hierarchy, a time interleave length per hierarchy and the like.
FIG. 5 is a block diagram illustrating a general configuration of the error correcting division 506. A frequency/time deinterleave unit 601 executes a frequency and time deinterleave process. A demapping unit 602 extracts bit information from carrier information. A hierarchy dividing unit (HDU) 603 divides data in the case of the hierarchical transmission. Bit deinterleave units 604A, 604B and 604C execute a bit deinterleave process per divided hierarchy. Depuncture units (DPUs) 605A, 605B and 605C execute a bit interpolation in response to the convolution encoding rate per divided hierarchy. A TS regeneration unit 606 organizes the data of the respective hierarchies into packet units of a predetermined bit length (herein, 1632 bits=204 bytes). A Viterbi decoding unit 607 executes Viterbi decoding at a coding rate of ½. A hierarchy dividing unit (HDU) 608 executes the hierarchical division again. Byte deinterleave units 609A, 609B and 609C execute a byte deinterleave process per divided hierarchy. Energy dispersal units (EDU) 201A, 201B and 201C execute an energy dispersal process per divided hierarchy. A hierarchy synthesizing unit (HSU) 610 synthesizes the data of the respective divided hierarchies. An RS decoding unit 611 decodes a shortened Reed Solomon code (204, 188).
Next, the energy dispersal units 201A, 201B and 201C, which are configured in the same manner as the energy dispersal unit 201 described earlier, execute the XOR operation with respect to the data signal excluding a synchronization byte and the PRBS. Shift registers of the respective energy dispersal units 201A, 201B and 201C are operated including a period of the synchronization byte and are initialized per frame.
“Standard Specification for Digital Broadcast Receiver (desired specification)” see ARIBSTD-B21, 3.2 Issue, formulated on Jul. 25, 2002 by the Association of the Radio Industries and Businesses.
The conventional energy dispersal unit employed in the ISDB-T and the ISDB-TSB indispensably demands the initialization at the frame leading position. A time length from the start of a signal reception to the frame leading position is 0.5 frame on average and one frame at maximum, because a timing of starting the signal reception is generated irrelevant to the frame cycle. A time length corresponding to 0.5 frame is approximately 27 ms to approximately 129 ms. A time length corresponding to one frame is approximately 53 ms to approximately 257 ms. It is impossible to start the energy dispersal process during the time period, which results in the generation of a standby time before a correct receive signal is outputted.
The timing of the frame cycle is different in each view channel, which generates the standby time whenever the channel is switched over in viewing a broadcast. The problem led to the disadvantage that a considerable time length was required to provide such services as to display an image on a screen and output an audio in response to the switchover of the channel.